1. Field
This disclosure relates generally to semiconductor devices, and more specifically, to controlling pre-charge operations for memory cells.
2. Related Art
Static random access memory (SRAM) is a form of volatile semiconductor memory. Rows and columns of memory cells are interconnected to each other to form a memory cell array. Wordlines are connected to rows of the memory cells within a memory cell array. Bit lines are connected to columns of the memory cells within a memory cell array. Wordlines and bit lines are used to read from and write to selected memory cells. Each memory cell includes a pair of cross-coupled inverters that receive and output data on a bus. One inverter is coupled to a bit line bus and the other inverter is coupled to a bit line_not bus. A sense amplifier is provided to sense a difference between the voltages on the bit line busses, and produce an appropriate logic output value corresponding to the state of the memory element.
To properly detect the voltage differential presented at bit line and bit line-not busses during a read operation, the bit line and bit line_not buses are “precharged” to a supply voltage before the particular memory cell is accessed. After a write operation, the bitline and bitline bar busses are separated full rail and the precharge operation following a write operation is one of the biggest contributors to dynamic power consumption in a memory cell array. As devices that use memory become increasingly smaller and portable, it is desirable to reduce the amount of power consumed for precharge operations.